including:
* A BootRAM and bootloader
* Two independent bi-directional 2KB DataRAM buffers
* A High-Speed x16 Host Interface
* On-chip Error Correction

where Product failure could result in loss of life or personal or physical harm, or any military or defense application,.

5. Added CE don’t care state for Asynch Write, Load, Program, and Block Erase timing diagram 1. Corrected Errata 2. Added Copy-back Program Operation With Random Data Input 3. Pended Active Erase Current 4. Changed tBA from 11ns to 11.5ns Draft Date.

KFG1G16Q2A-DEBx

KFG1G16Q2C

KFG1G1612M-DEB5

KFG1G16U2B

KFG1G16U2B-DIB6

KFG1216D2A

KFG1216D2M

KFG1216Q2A

KFG1216Q2M

KFG1216U2A

KFG1216U2M

KFG2816Q1M-DEB

KFG2816U1M-DIB